Calibrating non-volatile memory read thresholds
US10998041B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | May 7, 2020 |
| Grant date | May 4, 2021 |
| Priority date | — |
| Expiry date | May 7, 2040 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C29/52
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
In a read scan operation, a first read level window is scanned for a first candidate read level that activates the fewest number of memory cells in relation to other candidate read levels within that window. A second read level window for a second candidate read level is then configured based on a correlation between at least one of the two adjacent memory states and one or more other adjacent memory states associated with the second read level window. The second read level window is scanned for a second candidate read level that activates the fewest number of memory cells, or results in the fewest bit errors, in relation to other candidate read levels within the second read level window. Next, a read operation is configured to use the first candidate read level and the second candidate read level.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.