Shift register circuit and driving method therefor, and gate drive circuit and display device
US10998068B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Mar 22, 2019 |
| Grant date | May 4, 2021 |
| Priority date | — |
| Expiry date | Mar 22, 2039 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C19/287
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A shift register circuit includes a first circuit, M second circuits, and N third circuits. M and N are both positive integers, N is an integer multiple of M, M is greater than or equal to 2, and a quotient of N and M is greater than or equal to 2. The first circuit includes a first signal output terminal. Each second circuit includes a second signal input terminal connected to the first signal output terminal. Each third circuit includes a third signal input terminal that is connected to one of second signal input terminals of the M second circuits. A second signal output terminal of each second circuit is connected to third signal input terminals of N/M third circuits, and different second signal output terminals are connected to different third signal input terminals.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.