Semiconductor structure and method for forming a semiconductor structure

US10998396B2 · kind B2 · utility

Assignees

• Semiconductor Manufacturing (Beijing) International Corporation · CN
• Semiconductor Manufacturing (Shanghai) International Corporation · CN

Inventors

• Hu Lianfeng · Shanghai, CN
• Hu Youcun · Shanghai, CN
• Yang Ming · Shanghai, CN
• Bei Duohui · Shanghai, CN
• Ni Baibing · Shanghai, CN

Key dates

• Filing date: Aug 9, 2019
• Grant date: May 4, 2021
• Expiry date: Aug 9, 2039

Classification

• Technology area (CPC H): Electricity
• CPC primary: H01L23/5223
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

A semiconductor structure and a forming method thereof are disclosed. The forming method includes: providing a base; forming a first electrode layer on the base; forming a capacitance dielectric layer on a top and a sidewall of the first electrode layer; and forming a second electrode layer conformally covering the capacitance dielectric layer. Compared with a solution in which the capacitance dielectric layer only covers the top of the first electrode layer, in the present disclosure, an effective area between the second electrode layer and the first electrode layer is increased, the second electrode layer, the first electrode layer, and the capacitance dielectric layer located on the top of the first electrode layer construct one capacitance, and the second electrode layer, the first electrode layer, and the capacitance dielectric layer located on the sidewall of the first electrode layer construct other four capacitances. That is, the formed capacitor structure includes five parallel capacitances. In a situation in which other conditions are the same, for example, the areas of bases are equal, the capacitance density of the capacitor structure is increased.