System for parallelly processing image lines from multiple image sensors
US10999497B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 31, 2020 |
| Grant date | May 4, 2021 |
| Priority date | — |
| Expiry date | Mar 31, 2040 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04N23/951
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A system-on-chip (SoC) includes first and second processing circuits and a data exchange circuit such that the first processing circuit is configured to process image lines based on corresponding sets of processing attributes. The first processing circuit is further configured to continuously receive and process the image lines one after the other to generate corresponding output data, and the second processing circuit is configured to continuously receive by way of the data exchange circuit, the generated output data for processing the generated output data. The data exchange circuit is thus configured to control data flow between the first processing circuit and the second processing circuit such that the first processing circuit and the second processing circuit parallelly process corresponding data associated with same or different image lines.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.