Array substrate and display panel
US11003302B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 20, 2020 |
| Grant date | May 11, 2021 |
| Priority date | — |
| Expiry date | Mar 20, 2040 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04M2250/22
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An array substrate and a display panel including the array substrate are provided. The array substrate has a display area and a fan-shaped wiring area. A first metal layer, a second metal layer, and a third metal layer are arranged in both the display area and the fan-shaped wiring area, and a fourth metal layer is arranged in the fan-shaped wiring area. In the display area, the first metal layer includes gate lines, the second metal layer includes data lines, and the third metal layer includes touch lines. Fingerprint identification signal lines are arranged in the fan-shaped wiring area and are electrically connected to fingerprint identification units arranged in the display area. The fourth metal layer arranged in the fan-shaped wiring area includes at least one of the fingerprint identification signal lines, which avoids too many fingerprint identification signal lines being arranged in the same layer with other signal lines.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.