Co-verification of hardware and software
US11003573B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 9, 2020 |
| Grant date | May 11, 2021 |
| Priority date | — |
| Expiry date | Jan 9, 2040 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F11/3684
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An apparatus, a computer program product and a method for co-verification of systems comprising software and hardware components. The method comprises obtaining an over-approximation of the system that over-approximates the software or the hardware by using a non-deterministic version thereof; performing simulation of the over-approximation of the system; and utilizing an outcome of the simulation to guide a co-simulation of the system. The co-simulation comprises instrumenting the software to identify whether the coverage goals are reached during execution, generating a test input for the system, simulating execution of the test input by the instrumented software, wherein during said simulating, stimuli provided from the instrumented software to underlying hardware is provided to a hardware simulator that is configured to simulate the hardware-under-test; determining a coverage of the execution of the test input, and utilizing the coverage information in a successive iteration of the method.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.