Patent · US Active

Write assist circuitry

US11004503B1 · kind B1 · utility

1Cited by

1References

13Claims

0Family size

Assignee

Arm Limited · GB

Inventors

Lalit Gupta · Kanchinakote, IN
El Mehdi Boujamaa · Grasse, FR
Nicolaas Klarinus Johannes Van Winkelhoff · Meylan, FR
Bo Zheng · Sunnyvale, US
Fakhruddin Ali Bohra · Austin, US
Nimish Sharma · Jalandhar, IN
Hetansh Pareshbhai Shah · Ahmedabad, IN

Key dates

Filing date	Nov 27, 2019
Grant date	May 11, 2021
Priority date	—
Expiry date	Nov 27, 2039

Classification

Technology area (CPC G)Physics
CPC primaryG11C5/063
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

Various implementations described herein are directed to a device having memory circuitry with a core array of bitcells. The device may include write assist circuitry having passgates coupled to the bitcells via bitlines. The passgates may include a first passgate coupled to the bitcells via a first bitline and a second passgate coupled to the bitcells via a second bitline, and a gate of the second passgate may be coupled to the first bitline.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.