Hetero-integrated structure
US11004816B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 28, 2019 |
| Grant date | May 11, 2021 |
| Priority date | — |
| Expiry date | Aug 28, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/117
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A hetero-integrated structure includes a substrate, a die, a passivation layer, a first redistribution layer, a second redistribution layer, and connecting portions. The die is attached on the substrate. The die has an active surface and a non-active surface. The active surface has pads. The passivation layer covers sidewalls and a surface of the die to expose a surface of the pads. The first redistribution layer is located on the passivation layer and electrically connected to the pads. The second redistribution layer is located on the substrate and adjacent to the die. The connecting portions are connected to the first redistribution layer and the second redistribution layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.