Electro-optical apparatus having high-throughput electrical data links
US11006193B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 8, 2019 |
| Grant date | May 11, 2021 |
| Priority date | — |
| Expiry date | Oct 8, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04Q2011/0039
- WIPO fieldTelecommunications
- WIPO sectorElectrical engineering
Abstract
An electro-optical apparatus having an ASIC electrically linked, by way of a multistage SerDes, to an array of optical data transmitters and receivers. In an example embodiment, a first SerDes stage is connected to the ASIC by a plurality of relatively wide, short electrical buses and further connected to a second SerDes stage by a plurality of narrower, longer electrical buses. The second SerDes stage is located in close proximity to the transmitter/receiver array to enable the signals transmitted therebetween to be switched at a high frequency rate, e.g., higher than 500 MHz. The width and length of said narrower, longer electrical buses are selected such as to support a high overall data throughput for the corresponding electrical data links between the ASIC and the transmitter/receiver array while being able to afford acceptable levels of signal integrity, power usage, and timing skews in these links.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.