Producing method of wired circuit board
US11006530B2 · kind B2 · utility
0Cited by
1References
6Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jun 1, 2016 |
| Grant date | May 11, 2021 |
| Priority date | — |
| Expiry date | Feb 5, 2037 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10T29/49155
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A method for producing a wired circuit board includes a step (1) of forming a seed layer on one surface in a thickness direction of a peeling layer, a step (2) of forming a conductive pattern on one surface in the thickness direction of the seed layer, a step (3) of covering the seed layer and the conductive pattern with an insulating layer, a step (4) of peeling the peeling layer from the seed layer, and a step (5) of removing the seed layer. The insulating layer has the number of times of folding endurance measured in conformity with JIS P8115 (2001) of 10 times or more.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.