Array substrate for reducing coupling effect, display panel, display device, operating method, and manufacturing method
US11011091B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Aug 2, 2019 |
| Grant date | May 18, 2021 |
| Priority date | — |
| Expiry date | Aug 2, 2039 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G2330/06
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
An array substrate, a display panel, a display device, an operating method, and a manufacturing method are disclosed. The array substrate includes a wiring structure formed on a base substrate, and the wiring structure includes a common electrode line for connecting a common electrode, and a plurality of signal lines. The plurality of signal lines include at least one pair of signal lines, and the pair of signal lines include a first signal line and a second signal line. The first signal line is disposed on a first side of the common electrode line and is configured to transmit a driving signal for a gate driving circuit. The second signal line is disposed on a second side of the common electrode line and is configured to transmit an inverted signal of the driving signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.