Array substrates and display screens
US11011119B2 · kind B2 · utility
1Cited by
2References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Aug 13, 2019 |
| Grant date | May 18, 2021 |
| Priority date | — |
| Expiry date | Aug 13, 2039 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G2320/0223
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
The present disclosure relates to an array substrate and a display screen. The array substrate includes a first gate drive unit located in the non-display area and corresponding to pixels in the special-shaped display region, and a second gate driving unit located in the non-display area and corresponding to pixels in the non-special-shaped display region. A width-length ratio of a first output transistor of the first gate driving unit is smaller than a width-length ratio of a second output transistor of the second gate driving unit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.