Array substrate, method for fabricating the same, and display panel
US11011554B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Jun 7, 2018 |
| Grant date | May 18, 2021 |
| Priority date | — |
| Expiry date | Jun 7, 2038 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2203/04105
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Embodiments of the present disclosure provide an array substrate, a method for fabricating the same, and a display panel. The array substrate comprises a substrate, first signal lines and touch electrode signal lines the substrate. The touch electrode signal lines intersect with the first signal lines. Each of the touch electrode signal lines includes a plurality of first sub-signal lines and a plurality of second sub-signal lines. The first sub-signal lines are arranged in a same layer as and insulated from the first signal line. Each of the second sub-signal lines run across one of the first signal lines and are electrically connected with the first sub-signal lines adjacent to said second sub-signal line through vias. The first sub-signal lines are arranged in a layer different from the second sub-signal lines.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.