Linear low side recycling modulation
US11012058B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 6, 2020 |
| Grant date | May 18, 2021 |
| Priority date | — |
| Expiry date | May 6, 2040 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04R3/002
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A circuit includes a filter, a comparator, and converter. A first input of the comparator couples to the output of the filter. A second input of the comparator is configured to receive ramp signal. An input of the converter couples to the output of the comparator. The circuit also includes a dual minimum pulse generator having an input coupled to the output of the converter. The dual minimum pulse generator is configured to, responsive to an input pulse on the input of the dual minimum pulse generator having a pulse width less than a predetermined delay time period, generate a pulse on the first output of the dual minimum pulse generator that has a pulse width equal to a sum of the pulse width of the input pulse and the predetermined delay time period. A driver is coupled to the output of the dual minimum pulse generator.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.