Oscillator calibration structure and method
US11012226B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 5, 2020 |
| Grant date | May 18, 2021 |
| Priority date | — |
| Expiry date | Feb 5, 2040 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D10/00
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A short-reach data link receiver includes an edge detector configured to generate a pulse on an edge of a data input, a first clock-data recovery path coupled to an output of the edge detector for recovering a clock and data from the output of the edge detector, a second clock-data recovery path coupled to the output of the edge detector for recovering the clock and data from the output of the edge detector, and a controller configured to alternate between the first and second clock-data recovery paths to recover the clock and data using one of the paths while calibrating the other path. The controller may swap the paths whenever calibration of one path is completed. That may include beginning calibration of the next path immediately after swapping of the paths. Alternatively, power consumption may be reduced by delaying calibration of the next path after swapping of the paths.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.