Edge-based camera for characterizing semiconductor layout designs
US11017147B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 30, 2019 |
| Grant date | May 25, 2021 |
| Priority date | — |
| Expiry date | Aug 30, 2039 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F30/392
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
System and methods for an edge-based camera are disclosed. Semiconductor layout designs are a representation of an integrated circuit that are used to manufacture the integrated circuit. Parts of the layout design, such as points of Interest (POIs), may be subject to analysis with regard to a downstream application, such as hotspot detection. Unlike pixel-based characterizations, POIs are characterized using topological features indicative of quantized values and dimensional features indicative of analog values. For example, an edge may be characterized using a set of relations, which characterizes corners and polygons (including the polygon on which the POI resides and external polygons). In turn, the set of relations may be used to define image representations, including images in different directions relative to the POI (including cardinal and ordinal image). In this way, the topological/dimensional characterization of the POI may be used to analyze the POI in the layout design.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.