Silicon-oxide-nitride-oxide-silicon based multi level non-volatile memory device and methods of operation thereof

US11017851B1 · kind B1 · utility

Assignee

• Cypress Semiconductor Corporation · US

Inventors

• Venkataraman Prabhakar · Pleasanton, US
• Krishnaswamy Ramkumar · San Jose, US
• Vineet Agrawal · San Jose, US
• Long Hinh · San Jose, US
• Swatilekha Saha · San Jose, US
• Santanu Kumar Samanta · Narayanpur, IN
• Michael Amundson · Woodinville, US
• Ravindra M. Kapre · San Jose, US

Key dates

• Filing date: Mar 24, 2020
• Grant date: May 25, 2021
• Expiry date: Mar 24, 2040

Classification

• Technology area (CPC G): Physics
• CPC primary: G11C2211/5621
• WIPO field: Computer technology
• WIPO sector: Electrical engineering

Abstract

A semiconductor device that has a semiconductor-oxide-nitride-oxide-semiconductor (SONOS) based non-volatile memory (NVM) array including NVM cells arranged in rows and columns, in which NVM transistors of the NVM cells are configured to store N×analog values corresponding to the N×levels of their drain current (ID) or threshold voltage (VT) levels, digital-to-analog (DAC) function that receives and converts digital signals from external devices, column multiplexor (mux) function that is configured to select and combine the analog value read from the NVM cells, and analog-to-digital (ADC) function that is configured to convert analog results of the column mux function to digital values and output the digital values.