Patent · US Active

Integrated electronic circuit comprising a first transistor and a ferroelectric capacitor

US11018146B2 · kind B2 · utility

0Cited by

2References

9Claims

0Family size

Assignee

Fraunhofer-Gesellschaft zur förderung der angewandten Forschung e.V. · DE

Inventors

Konrad Seidel · Dresden, DE
Thomas Kaempfe · Dresden, DE
Patrick Polakowski · Dresden, DE

Key dates

Filing date	Aug 2, 2019
Grant date	May 25, 2021
Priority date	—
Expiry date	Aug 15, 2039

Classification

Technology area (CPC H)Electricity
CPC primaryH10D84/811
WIPO fieldElectrical machinery, apparatus, energy
WIPO sectorElectrical engineering

Abstract

The present invention relates to an integrated electronic circuit comprising a first transistor (1) and a ferroelectric capacitor (2). The ferroelectric capacitor (2) comprises a first electrode layer composed of a non-ferroelectric material, a ferroelectric interlayer having a thickness that is less than the thickness of the first electrode layer, and a second electrode layer composed of a non-ferroelectric material, wherein the ferroelectric interlayer is arranged between the first electrode layer and the second electrode layer, and the first electrode layer is electrically conductively connected to a gate terminal of the first transistor (1).

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.