Power combiner circuit
US11018641B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 3, 2019 |
| Grant date | May 25, 2021 |
| Priority date | — |
| Expiry date | Oct 15, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03F2200/451
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A power combiner circuit comprises a network topology for broadband RF and microwave systems that includes coupling elements, internodal matching sections, and an output matching section. The network topology serves as a combining mechanism for power from multiple power amplifiers. The network topology is designed so that characteristic impedances of transmissions lines serving as the coupling elements, internodal matching sections, and an output matching section produce a load impedance at an output port that is matched to the impedances seen by each power amplifier providing power to the power combiner circuit. Such a network topology is scalable to an unlimited number of power amplifiers, and enables a desired broadband frequency response for power amplification, while realizing a very low level of power output loss between input and output ports.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.