Clock glitch alerting circuit
US11018657B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 28, 2020 |
| Grant date | May 25, 2021 |
| Priority date | — |
| Expiry date | Dec 28, 2040 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K2005/00019
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A clock glitch alerting circuit is configured to detect a glitch in an input clock signal, and activate and provide an alert signal to a security controller when the glitch is detected. The clock glitch alerting circuit is further configured to delay the input clock signal based on multiple selection signals, and provide one of a delayed clock output signal and a filtered clock output signal to the security controller based on the alert signal. The clock glitch alerting circuit is further configured to generate and provide a count value to the security controller that indicates a time duration available by the security controller to execute a security critical operation after receiving the activated alert signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.