Patent · US Active

Parallel computing using stochastic circuits and deterministic shuffling networks

US11018689B2 · kind B2 · utility

0Cited by

3References

20Claims

0Family size

Assignee

Regents of the University of Minnesota · US

Inventors

Soheil Mohajer · Plymouth, US
Zhiheng Wang · Ann Arbor, US
Kiarash Bazargan · Plymouth, US
Marcus Riedel · Minneapolis, US
David J. Lilja · Maplewood, US
Sayed Abdolrasoul Faraji · Minneapolis, US

Key dates

Filing date	Oct 19, 2018
Grant date	May 25, 2021
Priority date	—
Expiry date	Jun 7, 2039

Classification

Technology area (CPC G)Physics
CPC primaryG06N5/01
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

In some examples, a device includes shuffling circuitry configured to receive an input unary bit stream and generate a shuffled bit stream by selecting n-tuple combinations of bits of the input unary bit stream. The device also includes stochastic logic circuitry having a plurality of stochastic computational units configured to perform operations on the shuffled bit stream in parallel to produce an output unary bit stream, each of the stochastic computational units operating on a different one of the n-tuple combinations of the bits.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.