Quarter-rate serial-link receiver with low-aperture-delay samplers
US11018845B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 5, 2019 |
| Grant date | May 25, 2021 |
| Priority date | — |
| Expiry date | Apr 5, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L2025/03509
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
The disclosed embodiments provide a system that implements a low-aperture-delay sampler. The system includes a sampler input, which receives an input signal, and a clock input, which receives a clock signal. The system also includes: a first sampling channel, which samples the input signal when the clock signal is low and is associated with a previous clock phase; and a second sampling channel, which samples the input signal when a rising edge is received in the clock signal, wherein the rising edge is associated with a present clock phase. The system additionally includes a combining mechanism, which combines outputs of the first and second sampling channels to produce a sampler output with a significantly reduced aperture delay.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.