Acceleration method for FPGA-based distributed stream processing system
US11023285B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 27, 2020 |
| Grant date | Jun 1, 2021 |
| Priority date | — |
| Expiry date | Jan 27, 2040 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/505
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The present invention relates to an acceleration method for an FPGA-based distributed stream processing system, which accomplishes computational processing of stream processing operations through collaborative computing conducted by FPGA devices and a CPU module and at least comprises following steps: building the FPGA-based distributed stream processing system having a master node by installing the FPGA devices on slave nodes; dividing stream applications into first tasks suitable to be executed by the FPGA devices and second tasks suitable to be executed by the CPU module; and where the stream applications submitted to the master node are configured with kernel files that can be compiled and executed by the FPGA devices or with uploading paths of the kernel files, making the master node allocate and schedule resources by pre-processing the stream applications.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.