Patent · US Active

Downstream slack creation in integrated circuit development

US11023634B1 · kind B1 · utility

2Cited by
14References
20Claims
0Family size

Assignee

Inventors

Key dates

Filing dateJan 14, 2020
Grant dateJun 1, 2021
Priority date
Expiry dateJan 14, 2040

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06F2119/12
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

Aspects of the invention include a method that includes performing timing analysis of an integrated circuit design to identify a critical path. The critical path fails to meet a corresponding timing requirement. The method also includes determining an amount of slack needed by the critical path. The amount of slack is an amount by which the critical path fails to meet the corresponding timing requirement. Downstream slack is created in each path of a next cycle, wherein each path of the next cycle is immediately downstream of the critical path. Slack stealing is performed to improve timing of the critical path based on the downstream slack created in each path of the next cycle.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.