Three-dimensional semiconductor device
US11024638B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 22, 2019 |
| Grant date | Jun 1, 2021 |
| Priority date | — |
| Expiry date | Jul 2, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B43/40
Abstract
A three-dimensional semiconductor device includes a first substrate, a second substrate on the first substrate, the second substrate including pattern portions and a plate portion covering the pattern portions, the plate portion having a width greater than a width of each of the pattern portions and being connected to the pattern portions, a lower structure between the first substrate and the second substrate, horizontal conductive patterns on the second substrate, the horizontal conductive patterns being stacked while being spaced apart from each other in a direction perpendicular to an upper surface of the second substrate, and a vertical structure on the second substrate and having a side surface opposing the horizontal conductive patterns.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.