Systems and methods for controlling instantaneous current changes in parallel processors
US11029745B2 · kind B2 · utility
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21Claims
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Key dates
| Filing date | Nov 8, 2018 |
| Grant date | Jun 8, 2021 |
| Priority date | — |
| Expiry date | May 11, 2039 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D10/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Systems and methods are disclosed method for controlling instantaneous current changes in parallel processors with arrays of parallel computing elements, such as neural processors. An exemplary method comprises monitoring the array of computing elements and determining a transition from a first activity level of the array to a second activity level of the array, such as an idle-to-active or active-to-idle transition. Once a transition is determined, the array is selectively controlled to minimize the instantaneous current change from the transition from the first activity level to the second activity level.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.