Integrated circuit device having a work function control layer with a step portion located on an element isolation layer
US11031392B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 5, 2019 |
| Grant date | Jun 8, 2021 |
| Priority date | — |
| Expiry date | Dec 5, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D86/215
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
An integrated circuit device includes a first fin-type active area and a second fin-type active area protruding from a substrate and extending in a first direction, an element isolation layer between the first and second fin-type active areas on the substrate, first semiconductor patterns being on a top surface of the first fin-type active area and having channel areas, second semiconductor patterns being on a top surface of the second fin-type active area and having channel areas, a first gate structure extending on the first fin-type active area in a second direction and including a first work function control layer surrounding the first semiconductor patterns and comprising a step portion on the element isolation layer, and a second gate structure extending on the second fin-type active area in the second direction and including a second work function control layer surrounding the second semiconductor patterns.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.