Hardware secure module, related processing system, integrated circuit, device and method
US11032067B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Jun 28, 2018 |
| Grant date | Jun 8, 2021 |
| Priority date | — |
| Expiry date | Dec 11, 2038 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L9/50
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A hardware secure module includes a processing unit and a cryptographic coprocessor. The cryptographic coprocessor includes a key storage memory; a hardware key management circuit configured to store a first cryptographic key in the key storage memory; a first interface configured to receive source data to be processed; a second interface configured to receive the first cryptographic key from the processing unit for storing in the key storage memory; a hardware cryptographic engine configured to process the source data as a function of the first cryptographic key stored in the key storage memory; and a third interface configured to receive a second cryptographic key. The hardware secure module further includes a non-volatile memory configured to store the second cryptographic key; and a hardware configuration module configured to read the second cryptographic key from the non-volatile memory and send the second cryptographic key to the third interface.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.