Array substrate and method of manufacturing the same, display panel and display apparatus
US11036108B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Mar 27, 2020 |
| Grant date | Jun 15, 2021 |
| Priority date | — |
| Expiry date | Mar 27, 2040 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG02F1/133612
- WIPO fieldOptics
- WIPO sectorInstruments
Abstract
An array substrate includes a substrate, at least one first light-shielding layer disposed above the substrate, semiconductor retention layers disposed on a side of the at least one first light-shielding layer facing away from the substrate, and data lines disposed on a side of the plurality of semiconductor retention layers facing away from the at least one first light-shielding layer. One first light-shielding layer of the at least one first light-shielding layer is disposed between one semiconductor retention layer of the semiconductor retention layers and the substrate, and an orthographic projection of the first light-shielding layer on the substrate covers an orthographic projection of the semiconductor retention layer on the substrate. The data lines are in one-to-one correspondence with the semiconductor retention layers, and an orthographic projection of each data line on the substrate overlaps with an orthographic projection of a corresponding semiconductor retention layer on the substrate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.