Patent · US Active

Network-on-chip for inter-die and intra-die communication in modularized integrated circuit devices

US11036660B2 · kind B2 · utility

9Cited by

2References

20Claims

0Family size

Assignee

Intel Corporation · US

Inventors

George Chong Hean Ooi · Bayan Lepas, MY
Lai Guan Tang · Bayan Lepas, MY
Chee Hak Teh · Kampung Bukit Kechil, MY

Key dates

Filing date	Mar 28, 2019
Grant date	Jun 15, 2021
Priority date	—
Expiry date	Jun 7, 2039

Classification

Technology area (CPC H)Electricity
CPC primaryH01L2924/15311
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

Systems or methods of the present disclosure may provide high-bandwidth, low-latency connectivity for inter-die and/or intra-die communication of a modularized integrated circuit system. Such an integrated circuit system may include a first die of fabric circuitry sector(s), a second die of modular periphery intellectual property (IP), a passive silicon interposer coupling the first die to the second die, and a modular interface that includes a network-on-chip (NOC). The modular interface may provide high-bandwidth, low-latency communication between the first die and the second, between the fabric circuitry sector(s), and between the first die and a third die.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.