Assigning identifiers to processing units in a column to repair a defective processing unit in the column
US11036673B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 22, 2019 |
| Grant date | Jun 15, 2021 |
| Priority date | — |
| Expiry date | Jun 11, 2039 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F11/2028
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method of recording tile identifiers in each of a plurality of tiles of a multitile processor is described. Tiles are arranged in columns, each column having a plurality of processing circuits, each processing circuit comprising one or more tiles, wherein a base processing circuit in each column is connected to a set of processing circuit identifier wires. A base value is generated on each of the set of processing circuit identifier wires for the base processing circuit in each column. At the base processing circuit, the base value on the set of processing circuit identifier wires is read and incremented by one. The incremented value is propagated to a next processing circuit in the column, and at the next processing circuit a unique identifier is recorded by concatenating an identifier of the column and the incremented value.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.