Gate driving circuit having stabilization
US11037517B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 28, 2019 |
| Grant date | Jun 15, 2021 |
| Priority date | — |
| Expiry date | Oct 28, 2039 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G2330/04
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A display device to display an image during frame intervals, and to display a blank image during a blank interval defined between the frame intervals, includes: a gate driving circuit including a plurality of stages, an ith stage (i is an integer greater than or equal to 2) from among the plurality of stages including a clock terminal to receive a clock signal, wherein the clock signal swings between a first clock voltage and a second clock voltage smaller than the first clock voltage during a normal interval corresponding to each of the frame intervals, and the clock signal is changed to a voltage lower than the second clock voltage during a stabilization interval corresponding to the blank interval.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.