Refresh processing method, apparatus, and system, and memory controller
US11037615B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 17, 2020 |
| Grant date | Jun 15, 2021 |
| Priority date | — |
| Expiry date | Jul 17, 2040 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C11/40611
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A refresh processing method, apparatus, and system, and memory controllers are provided, to improve memory access efficiency. The refresh processing apparatus includes a plurality of memory controllers that are in one-to-one correspondence with a plurality of memory spaces. Any first memory controller in the plurality of memory controllers is configured to: receive N first indication signals and N second indication signals that are output by N memory controllers other than the first memory controller, where N is greater than or equal to 1; and determine a refresh policy of a first memory space based on at least one of the following information: the N first indication signals, the N second indication signals, and refresh indication information of the first memory space.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.