Solid state drive architectures
US11037625B2 · kind B2 · utility
2Cited by
18References
20Claims
0Family size
Assignee
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Key dates
| Filing date | Jan 23, 2019 |
| Grant date | Jun 15, 2021 |
| Priority date | — |
| Expiry date | Feb 28, 2039 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D10/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A solid state drive (SSD) includes dynamic random access memory (DRAM), flash memory, and a solid state drive (SSD) controller. The solid state drive (SSD) also includes a peripheral component interconnect express (PCIe) bus to connect the SSD to a computing device such that a central processing unit (CPU) of the computing device exclusively reads data from, and writes data to, the DRAM. The SSD controller writes data to the flash memory from the DRAM independently of received commands from the computing device.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.