Ceramic electronic component and method for manufacturing ceramic electronic component
US11037729B2 · kind B2 · utility
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18Claims
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Key dates
| Filing date | Mar 8, 2019 |
| Grant date | Jun 15, 2021 |
| Priority date | — |
| Expiry date | Mar 8, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH05K2201/0254
- WIPO fieldMaterials, metallurgy
- WIPO sectorChemistry
Abstract
A ceramic electronic component that includes a plurality of ceramic layers which are stacked together, and an internal conductor layer disposed between two adjacent ceramic layers among the plurality of ceramic layers, and in which a ceramic layer that is adjacent to the internal conductor layer includes a plurality of pores.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.