Heterostructure semiconductor device and manufacturing method
US11037782B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 27, 2018 |
| Grant date | Jun 15, 2021 |
| Priority date | — |
| Expiry date | Aug 1, 2038 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/02658
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Disclosed is a semiconductor device and a method of fabricating the semiconductor device. The semiconductor device comprises a first III-V compound semiconductor layer having a first material structure, a second semiconductor layer having a second material structure and a third semiconductor layer having a third material structure. An interface between the first semiconductor layer and the second semiconductor layer consists of at least one corresponding crystalline terminating oxide layer of the first semiconductor layer, and an interface between the second semiconductor layer and the third semiconductor layer comprises at least one corresponding crystalline terminating oxide layer of a III-V compound semiconductor layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.