Semiconductor structure of work unit module
US11037886B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Dec 6, 2019 |
| Grant date | Jun 15, 2021 |
| Priority date | — |
| Expiry date | Dec 24, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/76224
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor structure of a work unit module includes an encircling noise-resistance structure and a P-type substrate being defined with a chip region and a surrounding region surrounding the chip region. The surrounding area includes two first strip regions and two second strip regions. Each of the first strip regions is located between the second strip regions, and each of the second strip regions is located between the first strip regions. The encircling noise-resistance structure is located on the surrounding area, and includes first arrangement units and second arrangement units. The first arrangement unit is arranged in one of the first strip regions in a single row. The second arrangement unit is arranged in one of the second strip regions in a single row, and the long axis direction of the second arrangement unit is different from the long axis direction of the first arrangement unit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.