Circuit device and electronic apparatus
US11037927B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 22, 2019 |
| Grant date | Jun 15, 2021 |
| Priority date | — |
| Expiry date | Mar 28, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/0179
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
An electronic circuit includes a noise source and an analog circuit and a logic circuit that may be adversely affected by noise. At least a portion of the analog circuit and the logic circuit is formed on a buried impurity layer whose conductivity is different from that of a substrate, and at least a portion of the periphery of that portion is surrounded by an impurity layer that is different from the substrate. Thus, propagation of the noise from the noise source is prevented.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.