Variable resistance memory device
US11037991B2 · kind B2 · utility
0Cited by
2References
17Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Apr 23, 2019 |
| Grant date | Jun 15, 2021 |
| Priority date | — |
| Expiry date | Apr 23, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10N70/8828
Abstract
A variable resistance memory device includes memory cells arranged on a substrate and an insulating structure between the memory cells. Each of the memory cells includes a variable resistance pattern and a switching pattern vertically stacked on the substrate. The insulating structure includes a first insulating pattern between the memory cells, and a second insulating pattern between the first insulating pattern and each of the memory cells. The first insulating pattern includes a material different from a material of the second insulating pattern.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.