Asymmetric source and drain structures in semiconductor devices
US11038054B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 13, 2019 |
| Grant date | Jun 15, 2021 |
| Priority date | — |
| Expiry date | Sep 13, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/76805
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The present disclosure provides semiconductor devices with asymmetric source/drain structures. In one example, a semiconductor device includes a first group of source/drain structures on a first group of fin structures on a substrate, a second group of source/drain structures on a second group of fin structures on the substrate, and a first gate structure and a second gate structure over the first and the second group of fin structures, respectively, the first and second groups of source/drain structures being proximate the first and second gate structures, respectively, wherein the first group of source/drain structures on the first group of fin structures has a first source/drain structure having a first vertical height different from a second vertical height of a second source/drain structure of the second group of source/drain structures on the second group of fin structures.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.