Patent · US Active

Bus node address verification

US11038712B2 · kind B2 · utility

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13Claims
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Key dates

Filing dateFeb 7, 2020
Grant dateJun 15, 2021
Priority date
Expiry dateFeb 7, 2040

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH04L61/5038
  • WIPO fieldDigital communication
  • WIPO sectorElectrical engineering

Abstract

Disclosed is a method for detecting an erroneous bus node address allocation in data bus systems with auto addressing using an addressing current, such as LIN data bus systems with auto addressing. The method comprises performing auto addressing of the n bus nodes, causing an addressing current to be supplied by a bus node, sensing the data bus current by the bus nodes and determining a bus node-specific bus current measurement value, deciding, whether an addressing current flows through the respective bus node, and determining a bus node-specific addressing current presence value, transmitting the bus node-specific bus current measurement value and/or the bus node-specific addressing current presence value from the bus node to the bus master, forming a supply bus node-specific result vector from the received bus node-specific addressing current presence values, and comparing the supply bus node-specific result vector and a supply bus node-specific expectation vector.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.