Patent · US Active

System and method for scheduling semiconductor lot to fabrication tool

US11042148B2 · kind B2 · utility

0Cited by
2References
20Claims
0Family size

Assignee

Inventors

Key dates

Filing dateMay 30, 2018
Grant dateJun 22, 2021
Priority date
Expiry dateFeb 8, 2039

Classification

  • Technology area (CPC Y)Emerging Cross-Sectional Technologies
  • CPC primaryY02P90/02
  • WIPO fieldSemiconductors
  • WIPO sectorElectrical engineering

Abstract

In the disclosure, a scheduled route of a lot may be rescheduled to another fabrication tool performing the same fabrication processes as to expand the production line and throughput. The controlling method includes at least the following steps. The lot is scheduled with a predetermined route having a plurality of fabrication tools configured to process the lot with a plurality of fabrication processes in a sequence. The lot is monitored as the lot is being processed by the fabrication tools in each of the fabrication processes, and inspection data is generated for each fabrication process. The lot is rescheduled to another fabrication tool outside of the predetermined route for one of the fabrication processes according to a release rule and the inspection data.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.