Computation engine that operates in matrix and vector modes
US11042373B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 14, 2020 |
| Grant date | Jun 22, 2021 |
| Priority date | — |
| Expiry date | Jul 14, 2040 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F17/16
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
In an embodiment, a computation engine is configured to perform vector multiplications, producing either vector results or outer product (matrix) results. The instructions provided to the computation engine specify a matrix mode or a vector mode for the instructions. The computation engine performs the specified operation. The computation engine may perform numerous computations in parallel, in an embodiment. In an embodiment, the instructions may also specify an offset with the input memories, providing additional flexibility in the location of operands. More particularly, the computation engine may be configured to perform numerous multiplication operations in parallel and to accumulate results in a result memory, performing multiply-accumulate operations for each matrix/vector element in the targeted locations of the output memory.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.