System, method and apparatus for secure functions and cache line data
US11042480B2 · kind B2 · utility
0Cited by
2References
21Claims
0Family size
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Key dates
| Filing date | Apr 26, 2019 |
| Grant date | Jun 22, 2021 |
| Priority date | — |
| Expiry date | Aug 16, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L9/0869
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A system, apparatus and method for secure functions and manipulating cache line data. The method includes generating cache block addresses from a subset of bits, i.e. tag bits, of a cache address and hashing the cache block addresses with one or more secure functions that use keys to generate secure indexes.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.