Patent · US Active

Method of manufacturing a HEMT device with reduced gate leakage current, and HEMT device

US11043574B2 · kind B2 · utility

0Cited by

0References

21Claims

0Family size

Assignee

STMicroelectronics SA

Inventors

Ferdinando IUCOLANO · Gravina di Catania, IT
Paolo BADALA' · Loreto, IT

Key dates

Filing date	Aug 7, 2019
Grant date	Jun 22, 2021
Priority date	—
Expiry date	Aug 7, 2039

Classification

Technology area (CPC H)Electricity
CPC primaryH10D64/256
WIPO fieldSurface technology, coating
WIPO sectorChemistry

Abstract

An HEMT device of a normally-on type, comprising a heterostructure; a dielectric layer extending over the heterostructure; and a gate electrode extending right through the dielectric layer. The gate electrode is a stack, which includes: a protection layer, which is made of a metal nitride with stuffed grain boundaries and extends over the heterostructure, and a first metal layer, which extends over the protection layer and is completely separated from the heterostructure by said protection layer.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.