High density, high availability compute system
US11044141B2 · kind B2 · utility
1Cited by
24References
10Claims
0Family size
Inventors
Key dates
| Filing date | Jul 9, 2019 |
| Grant date | Jun 22, 2021 |
| Priority date | — |
| Expiry date | Jul 9, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH05K7/20772
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A new physical computer architecture that combines elements in a virtuous cycle to eliminate performance killing inefficiencies in compute systems and need never be physically repaired during its lifetime is described. The system comprises a three dimensional rectangular cube structure with integrated liquid cooling and a multi-dimensional direct network laced through it. The network comprises a distributed, dynamically adaptive, multiply-fault-tolerant routing protocol that can logically replace failed components.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.