Three-dimensional vertical NOR flash thin-film transistor strings
US11049879B2 · kind B2 · utility
8Cited by
37References
39Claims
0Family size
Assignee
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Key dates
| Filing date | Oct 12, 2020 |
| Grant date | Jun 29, 2021 |
| Priority date | — |
| Expiry date | Oct 12, 2040 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/037
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A memory structure, includes active columns of polysilicon formed above a semiconductor substrate, each active column includes one or more vertical NOR strings, with each NOR string having thin-film storage transistors sharing a local source line and a local bit line, the local bit line is connected by one segment of a segmented global bit line to a sense amplifier provided in the semiconductor substrate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.