Reordering of data for parallel processing
US11050682B2 · kind B2 · utility
0Cited by
0References
26Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Sep 28, 2017 |
| Grant date | Jun 29, 2021 |
| Priority date | — |
| Expiry date | Oct 28, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L49/3045
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A network interface device, including: an ingress interface; a host platform interface to communicatively couple to a host platform; and a packet preprocessor including logic to: receive via the ingress interface a data sequence including a plurality of discrete data units; identify the data sequence as data for a parallel processing operation; reorder the discrete data units into a reordered data frame, the reordered data frame configured to order the discrete data units for consumption by the parallel operation; and send the reordered data to the host platform via the host platform interface.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.