Sub-sampled color channel readout wiring for vertical detector pixel sensors
US11050982B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 27, 2020 |
| Grant date | Jun 29, 2021 |
| Priority date | — |
| Expiry date | Mar 27, 2040 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04N25/76
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
In an array of multi-color vertical detector color pixel sensors, a readout wiring architecture includes a transfer transistor for each individual color detector. In first and second rows in a first column, the first, second, and third color transfer transistor gates are coupled, respectively, to the first, second, and third row-select lines. In a first row in a second column, the first color transfer transistor gate is coupled to the second row-select line, the second color transfer transistor gate is coupled to the first row-select line, and the third color transfer transistor gate is coupled to the third row-select line. In a second row in the second column, the first color transfer transistor gate is coupled to the first row-select line, the second color transfer transistor gate is coupled to the third row-select line, and t the third color transfer transistor gate is coupled to the second row-select line.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.