Semiconductor device test system and semiconductor device test method
US11054466B2 · kind B2 · utility
0Cited by
5References
20Claims
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Key dates
| Filing date | May 31, 2018 |
| Grant date | Jul 6, 2021 |
| Priority date | — |
| Expiry date | Oct 19, 2039 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2029/5602
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
A semiconductor device test system and a semiconductor device test method are provided. The system includes a device under test (DUT) which provides an output voltage to a load connected to an output terminal, automatic test equipment (ATE) which supplies power to the DUT and measures the output voltage of the DUT, and a current mirror which is connected between the ATE and the DUT. The ATE outputs a reference current to the current mirror, and the DUT provides an output current to the current mirror. The output current is obtained by mirroring the reference current from the ATE.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.